FPGA Based System for Human Chromosome Classification

Computer-aided systems based on artificial neural networks (ANN) are suitable for automatic chromosome classification process. However, the software based implementation of these systems running on conventional computer transforms the parallelism features of the ANN into serial operations that reduce their computation power. The hardware implementation of such system can achieve the parallelism required by ANN. This paper describes the idea of designing and implementing an FPGA (Field-programmable gate array) based system on chip (SoC) for human chromosome classification. The proposed SoC aims to realize an automatic karyotyping that helps cytogeneticist in genetic syndrome diagnosis with minimum human intervention, while reducing time, power consumption, effort and cost. The achieved part of the SoC concerns the classification subsystem based on Kohonen neural network which is the main part. The classification subsystem has been successfully implemented and tested on the Virtex5 FPGA development board. In the proposed hardware implementation of the chromosomes classifier, the total power consumption is about 0.4286W. The power consumption is noticeably reduced compared to computer based one. Keywords— FPGA, Human chromosomes, Image processing, Kohonen, Neural Network, SoC.